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PhD Defence Ahmed Ibrahim

test standards reuse for structured and cost-efficient dependability management of system-on-chips 

Ahmed Ibrahim is a PhD Student in the research group Computer Architecture for Embedded Systems. His supervisors are associate professor Hans Kerkhoff and professor Gerard Smit from the Faculty of Electrical Engineering, Mathematics and Computer Science.

The continuous development in silicon manufacturing technologies and the increased reliance on design automation and IP reuse, allowed the development of complex System-on-Chips (SoCs) in order to meet the growing application processing requirements. However, the aggressive technology scaling leads to increasing lifetime dependability challenges, which might lead to huge financial and even human losses in case of safety critical applications. Therefore, addressing such challenges becomes an important design concern.

Test standards enable a structured methodology for testing complex SoCs, and hence, they are widely used in practice with the support of design automation tools. The IEEE 1687 standard enables an efficient methodology for accessing and operating embedded instruments that are used for different purposes, such as testing, debugging, diagnosis, configuration, characterization and monitoring. A subset of such instruments are also used in dependability management, such as temperature sensors, voltage monitors, Built-In-Self-Test engines and many others. Consequently, utilizing the IEEE 1687 standard in the design of dependability management solutions for the access of embedded instruments will enable their development in a structured and cost-efficient manner, which will subsequently boost their large scale adoption.

In this thesis, the efficient utilization of the IEEE 1687 standard in dependability management is addressed. The standard enables the construction of very flexible networks to access embedded instruments. In addition, it presents two software languages for documenting its defined hardware infrastructure and the operating procedures of the instruments.

The IEEE 1687 standard follows a descriptive approach in defining the compliant instrument networks, which results in a very large design space. In addition, this descriptive approach gives rise to networks with complex structural and temporal dependencies between the network components. Those complex dependencies are required to be resolved in order to perform access operations. Consequently, IEEE 1687 network modelling and access operations should be performed in a comprehensive manner in order to cover arbitrary IEEE 1687-compliant networks.

A novel on-chip structural model for IEEE 1687 networks is devised in this thesis after carefully analysing the specifications of the network construction that are described by the standard. Subsequently, an automated process for the model generation is presented. This structural model is utilized in performing on-chip access operations on arbitrary IEEE 1687 networks.

Furthermore, the IEEE 1687 standard defines the pattern retargeting process in order to enable the reuse of the instrument operating procedures. In this thesis, pattern retargeting is performed on-chip in order to enable the reuse of dependability procedures that incorporate the operating procedures of the individual instruments. This is achieved by carefully analysing the temporal behaviour of the networks. Subsequently, two methods for pattern retargeting are introduced, the first for general arbitrary networks, and the second is optimized for purely hierarchical networks.

The architectural and performance requirements for dependability networks are subsequently analysed. Afterwards, architectural modifications and hierarchical network construction and management methods are introduced. This allows for an efficient utilization of the IEEE 1687 hierarchical networks in dependability management, without affecting the off-chip access performance.

Finally, an execution model for dependability procedures that use embedded instruments is proposed, by adopting two state-of-the-art execution models, and further adapting them for the usage of the IEEE 1687 standard for instrument access. The resulting execution model incorporates the modelling and retargeting methods, in addition to the network organization and architectural modifications that are proposed in this thesis.

The implementation of this execution model into a hardware platform for the processing of dependability procedures and the corresponding software development flow, serves as a realization of the envisioned structured and cost-efficient dependability solution for SoCs.

Since the use of the IEEE 1687 standard in dependability management is getting more attention, this thesis is expected to trigger more research activities in this area.