Project Number: 13769
Project Manager: Dr.ir. Ronan van der Zee
Faculty of Electrical Engineering, Mathematics and Computer Science
This “Slow Wireless” proposal focuses on radio links in wireless sensor networks that need low data rates (bytes/second). The conventional approach is to use duty cycling: turn off the radio in the node for most of the time, and transmit the data in short bursts to save energy. The radio is often a fairly standard radio, optimized for low-power duty-cycled operation. Because of timing uncertainties in the receive and transmit time slots, both should be turned on longer than necessary. To circumvent this problem, and to achieve lower receiver power in general, there has been high scientific interest in ultra-low-power (W) receivers, which have been realized with varying performance. Similarly, there has been attention for wake-up receivers: receivers that use very little power and ‘listen’ whether they should wake up the main radio. A major problem for published low-power receivers is that they are not very robust to interference, most of them not at all. Ultra- wideband (UWB) techniques can solve this, but the power consumption would be very high.
In this project we want to go in the opposite direction, and explore very narrowband systems. Most interference nowadays is wideband, because it uses spread spectrum or OFDM, as in Bluetooth and Wi- Fi. By choosing a very narrowband system, most interference can be filtered out, even when the interference frequency band covers the desired communication channel.
To research such an approach, we bring together expertise from three distinct areas: telecommunication engineering, integrated circuit design and embedded computer architecture design. In three closely related work packages we will explore the implications and opportunities for the link behavior, fading, frequency control, modulation techniques and radio architecture. First explorations suggest that there are good opportunities to arrive at low-power, interference-robust radios, and the research in this proposal would contribute significantly to clarify the trade-offs involved and to arrive at an actual demonstrator implementation.
Project duration: 2014-2018
Project budget: 833 k-€ / 693 k-€ funding
Number of person/months: 3.6 fte / year
Involved groups: Integrated Circuit Design, Telecommunication Engineering, Computer Architectures and Embedded Systems
CTIT Research Centres: Centre for Array Technology, Centre for Wireless and Sensor systems, Centre for Green ICT