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ELESIS: European Library-based flow of Embedded Silicon test Instruments

Project Number:

Project Manager: Dr. ir. Hans Kerkhoff

Faculty of Electrical Engineering, Mathematics and Computer Science

Tel.: +31-53-4892646

Email: h.g.kerkhoff@utwente.nl

Project website: ELESIS


The ELESIS project is focussed on improving the industrial test infrastructure for Integrated Circuits, leading to safe, reliable, high quality and low cost semiconductors products in Europe. The project is relevant to the Design Technologies domain and is addressing the Grand Challenges managing complexity, managing diversity and design for reliability and yield.

Ilustration of Integration and Industrialization in ELESIS

ELESIS is a very ambitious project which plans to cover the mentioned targets (Safety, reliability, high quality and low cost) for mixed signal circuits in addition to digital, with special focus on Analog, RF and Sensors. The ELESIS project will also target a European Standard Interface to reduce test complexity and to manage access to the internal IP blocks from the top level IC. We will address the most important aspects of semiconductor testing within a framework of so-called “embedded test instruments” controlled through a common interface that is needed to ensure the best solutions to reach our challenging targets. The proposed standard interface will have a large economic impact by the creation of an Open Source Platform, which could be used by IP, IDM and Fabless companies in Europe and even worldwide.

Project duration: 1-7-2012 – 1-7-2016

Project budget: 24.3 M-€

Number of person/months: 2145 person months

Project Coordinator: NXP Semi Conductors

Participants: NXP Semi Conductors, STMicroelectronics, NXP Semiconductors France, ATMEL, Salland Engineering, JTAG Technologies, D4T Systems, Temento Systems S.A., PRESTO Engineering, iRoC Technologies, Infineon Technologies, Q-Star Test, CEA, IPG/TIMA, CNRS-LIRMM, INESC Porto, UT

Project budget CTIT: 1.4 M-€ / 688 k-€ funding

Number of person/years CTIT: 155 person months

Involved groups: Computer Architecture for Embedded Systems (CAES)

CTIT Research Centre: Centre for Array Technology (CAT)