Cutting-edge Reconfigurable ICs for Stream Processing
Project Manager: Prof. dr. ir. Gerard Smit
Faculty of Electrical Engineering, Mathematics and Computer Science - EEMCS
Tel.: +31 53 489 3734
The CRISP (Cutting edge Reconfigurable ICs for Stream Processing) project researches optimal utilization, efficient programming and dependability of reconfigurable many-cores for streaming applications. The project has four central themes: Streaming Applications, General Stream Processor (GSP), Run-time Mapping and Dependability.
- Streaming applications range from low-end consumer electronics and automotive applications to demanding high-end medical and defence applications. In CRISP, beamforming and satellite navigation are used for proof of concept.
- Tomorrow’s GSP is to be prototyped in CRISP. The GSP is a dynamically reconfigurable many-core for streaming applications. It offers flexibility, high performance, low power, a small footprint and design tools support.
- Computational resource utilization in a many-core can be dramatically improved by dynamic hardware/software partitioning at run-time. This also enables: upgrading, bug fixing and hardware fault diagnosis and repair.
- Dependability and yield of deep-submicron chips are improved using new techniques for static and dynamic detection and localization of faults and (dynamically) circumventing faulty hardware.
The partners (Recore, Uni. Twente, Atmel, Thales, Tampere Uni. and NXP) in the small and decisive CRISP consortium complement each other and collaborated successfully in the past. Due to a clear common vision, a full description of work is already agreed.
Dissemination and exploitation are principal in the CRISP project. Europe can benefit quickly from CRISP, as the major project innovations will be applied directly in commercially available reconfigurable technology.
Streaming applications have very high market potentials and will drive demand for reconfigurable platform chips. CRISP contributes to European excellence in streaming applications and presumably increases European market shares of inexpensive stream processing platforms and allows Europe to achieve a world leading position.
Project duration: 1 January 2008 / 1 January 2011
Project budget: 4.4 M-€ / 2.8 M-€ funding
Number of person/years: 45.75 fte (total) / 15.25 fte / year
Participants: Recore, UT, Atmel, Thales, Tampere University and NXP
Project budget CTIT: 709.5 k-€ / 536.2 k-€ funding
Number of person/years CTIT: 5.16 fte (total) / 1.72 fte/year
Involved group: Computer Architecture for Embedded Systems