LLM-driven FPGA Design
Problem Statement
Can we design electronic systems automatically? Explore the integration of Large Language Models (LLMs) in the design and optimization of Field-Programmable Gate Arrays (FPGAs)! The study will investigate how LLMs can be leveraged to automate and enhance various aspects of FPGA design, including logic synthesis, placement, and routing. The goal is to improve design efficiency, performance, and adaptability.
Tasks
- Define Methodology: Develop a methodology for integrating LLMs into the FPGA design process, specifying the roles and interactions of the models.
- Algorithm Development: Create algorithms that utilize LLMs for tasks such as logic synthesis, placement, and routing in FPGA design.
- Implementation: Implement the proposed methodology and algorithms in a simulated environment to test their feasibility and effectiveness.
- Performance Evaluation: Assess the performance of LLM-driven FPGA designs in terms of speed, resource utilization, and power efficiency.
- Case Studies: Identify and analyze real-world applications where LLM-driven FPGA design can offer significant advantages.
Work
10% Theory, 70% Simulations, 20%Writing
Contact
Alessandro Chiumento (a.chiumento@utwente.nl), room ZI0515