UTFacultiesEEMCSEventsPhD Defence Chris Lokin | Active PWM Ripple Reduction in Class-D Amplifiers using Digital Loop Filters

PhD Defence Chris Lokin | Active PWM Ripple Reduction in Class-D Amplifiers using Digital Loop Filters

Active PWM Ripple Reduction in Class-D Amplifiers using Digital Loop Filters

The PhD Defence of Chris Lokin will take place in the Waaier building of the University of Twente and can be followed by a live stream.
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Chris Lokin is a PhD student in the department Integrated Circuit Design. (Co)Supervisors are prof.dr.ir. B. Nauta and dr.ir. R.A.R. van der Zee from the faculty of Electrical Engineering, Mathematics and Computer Science.

The research field around sound reproduction is driven by a desire to continuously pack more powerful amplifiers in a small fan-less enclosure while providing state-of-the-art noise and distortion performance. Class-D amplifiers are a perfect candidate for these requirements, specifically because of the inherently low dissipation in their switching power stage with respect to more conventional linear amplifiers. There is, however, always a caveat: switching high currents at high frequencies causes electromagnetic emissions that could interfere with the correct operation of other electronic devices. Regulations limit the amount of electromagnetic interference (EMI) that devices are allowed to emit to maintain interoperability between the many electronic devices in the Internet of things (IoT) era.

Speakers are commonly connected to an amplifier using leads of several meters. These leads double as an antenna for high frequency signals above the audio band, such as the switching frequency and its harmonics or parasitic ringing in the output stage, thereby causing unwanted radiated emissions. This thesis is focused on reducing the EMI due to the residual power after the output filter at the pulse-width modulation (PWM) frequency, the so called ripple. Examples in literature reduce the power at the PWM frequency and its harmonics by applying spread spectrum modulation to smear power out over a larger bandwidth. However, in this way they still radiate the same amount of power, just not concentrated at distinct frequencies. To reduce the ripple current through the speaker leads, it is possible to use a higher order filter, use a multi-phase or multi-level output stage or to inject a cancellation signal after the output filter. In the research field of power electronics, cancellation schemes have been presented. First the disturbance is sensed and processed and afterwards a cancellation signal is synthesized and injected into the circuit. The processing can be done using a feedback or feed-forward topology, each having its advantages and disadvantages.

An extensive case study on multi-phase systems is done to evaluate their merits in reducing the ripple current after the output filter. In a multi-phase system, multiple half-bridges are combined in a parallel fashion to drive one or both sides of the load. Interleaving of the PWM carriers in the modulator corresponding to each half-bridge provides a reduction in the observed ripple current after combining the half bridge outputs in the output filter. The effect of adding more phases on the amount of ripple is studied as well as the costs associated to multi-phase implementations.

In the field of power conversion, multi-level systems are often used to relax the output ripple by switching between multiple voltage levels. By reducing the voltage steps, the emissions are also lowered which is especially of importance when switching powers in excess of 1~kW. Different multi-level architectures are discussed to find whether they are applicable in audio amplifiers or not.

The feasibility of the aforementioned techniques has been considered with the main goal of having a system with fewer external components. Multi-phase and multi-level systems are hence not a suitable choice and a further case study between feed-forward and feedback ripple reduction techniques showed the latter to be the most straightforward to implement. A development board made by Axign utilizing the AX5689 digital amplifier controller IC was used as a design vehicle to realize a prototype bridge-tied-load (BTL) Class-D amplifier with ripple reduction. The built-in analog-to-digital converters (ADCs) were used to measure the output signals of both bridge halves. A selective digital band-pass loop filter was designed in the digital signal processor (DSP) core of the AX5689 to only provide high loop-gain around the PWM frequency without affecting the audio band. A ripple reduction of 28~dB for the common-mode (CM) and 18~dB for the differential mode (DM) was achieved across all signal frequencies and output powers up to 10~W. The Class-A drivers used to inject the anti-ripple have a negative impact on the total system efficiency, which drops from 84\% without ripple reduction to 79\% with ripple reduction enabled. The technique has virtually no impact on total harmonic distortion plus noise (THD+N) performance and could be used as an add-on to any Class-D amplifier with a fixed PWM frequency. Efficiency still has to be improved to make the solution more attractive for the industry. A monolithic realization of the system could further improve the efficiency and the ability to reduce the ripple.

Designing the digital band-pass filter of the prototype faced some challenges regarding processing delay. Compensating dynamics near the sample frequency becomes more difficult when processing delay is present. Ways to mitigate the effect of non-fractional delays on loop stability have been investigated and compared to similar techniques. In the research field of continuous-time ΣΔ ADCs, a technique called excess loop delay (ELD) compensation is used to stabilize the loop filter in presence of a known delay in the feedback path. When the quantizer delay is less than one clock cycle, it is possible to restore the noise transfer function (NTF) to that of the delay-less system by tuning the loop-filter coefficients and adding a direct path around the quantizer. Quantizer delays in excess of one clock cycle do not allow for full restoration of the desired NTF. This phenomenon shares similarities to our proposed delay mitigation technique. The impact of both techniques on noise-shaping performance are analyzed and the proposed method is shown to also have merits in mitigating the effect of parasitic high-frequency poles.

In summary, this thesis has shown a technique to reduce the ripple current after the output filter. Thereby the amount of EMI that can be radiated off the speaker leads decreases. The effect of unit delays in the loop has been mitigated by applying a special filter design method to obtain a more stable system. A prototype has been made around an existing amplifier to show the effectiveness of the proposed feedback ripple reduction solution.