Project

The SIRENA project has been awarded the prestigious and highly competitive EIC Transition Grant to scale-up novel computing primitives into adaptive, efficient and intelligent hardware designs.

The rapid proliferation of artificial intelligence has driven an unprecedented demand for specialised AI accelerator hardware, powering applications ranging from natural language processing to autonomous systems. The associated energy consumption represents a significant and growing challenge at a global scale. SIRENA addresses this challenge by establishing a new class of semiconductor technology that makes AI inference efficient across the full compute continuum, from edge devices to cloud infrastructure.

At the core of SIRENA are Reconfigurable Nonlinear Processing Units (RNPUs): CMOS-compatible devices that perform analogue signal transformation and feature extraction with tunable nonlinearity and local adaptivity. This approach yields an order-of-magnitude reduction in energy consumption, alongside improvements in latency and integration density compared to conventional digital accelerators. RNPUs are designed to complement existing compute paradigms — CPUs, GPUs, and NPUs — or to operate as standalone accelerators, enabling always-on intelligence in resource-constrained environments such as wearables, automotive systems, and sensor nodes.

SIRENA's broader objective is to deliver a highly efficient and versatile AI acceleration platform while seeding a sustainable European ecosystem around it. By 2032, the technology is projected to support billions of daily inference tasks, with measurable reductions in energy use, operational cost, and carbon footprint. In doing so, SIRENA contributes to Europe's sovereign capability in a strategically critical layer of the next generation of computing infrastructure.

SIRENA project

The SIRENA project has received funding from the European Union's Horizon Europe research and innovation programme under Grant Agreement No 101291538.