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Frank te Beest (promotion date: 24 March 2003)

Full Scan Testing of Handshake Circuits


Interview date: 24 March 2003

Frank te Beest

I worked in close collaboration with Philips. Philips has developed a design method to make asynchronous digital circuits.
Despite of the fact that asynchronous circuits are highly unpopular - 99,9% of circuit technology is synchronous- asynchronous circuits have certain advantages.

Could you tell us something about your research?
I worked in close collaboration with Philips. Philips has developed a design method to make asynchronous digital circuits. Despite of the fact that asynchronous circuits are highly unpopular - 99,9% of circuit technology is synchronous -, asynchronous circuits have certain advantages. At Philips they are focusing on the fact that asynchronous circuits cause less interference with other systems like radio signals and analogue systems and that they are less energy consuming (which is no small issue considering the total amount of energy consumption for computer use for instance in a country like the United States). Intel and Sun are developing asynchronous circuits with a focus on speed.


If you take into account that it is virtually impossible to test a Pentium size circuit after its production, this is even the case for an asynchronous circuit. So testability has to be built into the circuits of the chip itself. This added circuitry is available for synchronous chips, but was not for asynchronous chips.


That was the subject of my study: to develop a method to add technology to asynchronous chips and thus make them subject to quality tests after production.
With my research this has been done in a structured way for the fist time.

You mean that this is a real breakthrough?
Yes, although there are still some bridges to cross. When designing asynchronous chips, or any chip for that matter, testability has to be taken into account. With my programme every circuit on the asynchronous chip is modified for testing purposes. This results in a bigger chip and consequently, higher costs. These may be reduced by both refining my method as well as by adopting a design strategy that integrates testability.

Did you work alone?
There were close contacts with Philips. They possess the knowledge of the circuits to which the new technology was added. And I used their programming environment to develop my method. And of course there were the consultations with my mentors, at Philips and here. But I did not work in a group as such.

What did you enjoy most?
The innovative part. I have been working on something that is completely new. It has not been done before and it is quite exciting to be the fist person doing it. In the first year we considered the options for the approach and during the course of the second year I got the feeling I was on the right track. That is very gratifying.

What next?
The next two years I will be in Eindhoven, improving my method, for which there was no time during my research. It will make a difference to be in one place at the time and not having to travel from Eindhoven to Enschede and vice versa.

So if there is hardly any future for asynchronous chips, what is the practical application of your research?
Well, I definitely do think there is a future for asynchronous chips. It is only that the design of the synchronous chip is so much easier. It took quite some time before it was at all possible to design asynchronous chips. Methods for structural design are relatively new.
The smart cards are at Philips an important application, for reasons of security. Synchronous chips are traceable whereas this is definitely more complicated with asynchronous chips.

For the summary of the thesis, click here. (English)