Summary Karthikeyan Shunmugavel

A Josephson junction is the basic element of rapid single flux quantum logic (RSFQ) circuits. A high operating speed and low power consumption are the main advantages of RSFQ logic over semiconductor electronic circuits. To realize complex RSFQ circuits in HTS technology one needs a reproducible fabrication of Josephson junctions with low parameter spread. High quality HTS junctions require a fully epitaxial multilayer structure with clean interfaces and a smooth surface morphology. Neodymium barium copper oxide (NBCO) thin films were used as superconducting electrodes due to their high transition temperature and low surface roughness. NBCO forms a solid solution in which Nd³⁺ ions can substitute for Ba²⁺ ions with the formula Nd_1+xBa_2-xCu₃O_y (x=0.12 in our study). Cation disorder and oxygen deficiency affect the structural and electronic properties of grown NBCO films. Target composition, substrate temperature, oxygen partial-pressure and annealing steps are properly chosen to obtain smooth films with a high transition temperature. NBCO is deposited on an STO buffered MgO substrate at a pressure of 0.35 mbar in an Argon and Oxygen (20:1) gas mixture. The substrate temperature was fixed at 820⁰ C. The deposited film is smooth with a surface roughness of 1-3 nm for a 150 nm thick layer and a transition temperature around 90K.

Ramp type junctions with charge transport along the crystallographic ab-plane of the superconducting electrodes are attractive for RSFQ circuits because the current-voltage (I-V) characteristics can be controlled by the barrier material and its thickness. Junctions can be placed freely within the ab-plane to increase the circuit density. An in-situ deposition of a NBCO base electrode and a bi-layer of PBCO/STO have been performed and ramp edges are defined by argon ion milling. The PBCO/STO bi-layer is used as an isolation layer to separate the superconducting electrodes. After the ramp cleaning process and ramp annealing steps, a thin barrier and the top NBCO electrode are deposited. Gallium doped PBCO was used as a barrier material. Then, junction widths are defined and the contact pads are made by using a gold lift-off process. From the measurements, it was found that junctions showed resistively-shunted-junction (RSJ) like I-V characteristics with some amount of excess current. The spread in critical current, ranges between 5 and 20 percent from the mean value over an area of 1 mm². The spread in junction parameters is mainly determined by the smoothness of the ramp surface and the growth of the barrier and the top electrode. Degradation of the transition temperature of the NBCO electrode additionally affects the reproducibility and the spread in critical current. Attempts to fabricate junctions using the concept of an additional repairing interlayer have been made. First results showed a large spread with a low I_CR_N product around 260μV at 10K. With the introduction of a ground plane, the inductances of the strip lines are reduced further. Direct injection SQUIDs are fabricated and the inductance of the base and top electrodes are measured.

Oversampling delta-sigma superconducting analog to digital converters can obtain a high dynamic range over a MHz bandwidth by utilizing the high switching speed of Josephson junctions. A first order delta-sigma modulator with a current input consists of an RL integrator and the integrated current input is digitized by the Josephson comparator. For every SFQ pulse output, the integrator current is reduced by . The dynamic range can be further improved by using a higher order modulator. A second order modulator has been designed and its performance has been investigated by simulation using the Josephson simulator (JSIM) and by analyzing the modulator output by a Fast Fourier Transform (FFT). A Second order modulator has two integrators and the feedback to the integrator, connected to the comparator, is given by the quantizer junction itself. The feedback system, providing a feedback gain to the integrator directly connected to current-signal input, increases the complexity of the circuit. Increasing the number of feedback pulses m improves the noise shaping property. The effect of the integrator inductor on the performance of the modulator and the chances of realization of the second order modulator in HTS technology have been investigated.

One of the main challenges of RSFQ logic circuits is the transfer of SFQ data to semiconductor circuits due to the low signal level of a Josephson junction and the narrow pulse-width of a few picoseconds. We have studied the use of a pulse stretcher as an interfacing circuit between a RSFQ logic circuit and room temperature electronics. The pulse stretcher provides an extended voltage pulse for every SFQ data pulse. Since the output voltage level is limited by the I_CR_N product of the output junctions, a low noise and low input impedance amplifier is required to detect and improve the signal level further. The pulse width at the pulse stretcher output is limited by the bandwidth of the amplifier. We have studied two kinds of pulse stretcher circuits and estimated the fabrication yield of both pulse stretchers as function of the parameter spread. A pulse stretcher circuit was fabricated in HTS ramp type technology and its digital operation was successfully verified experimentally at 47 K. False switching has occasionally been observed in some samples due to various reasons. Unavoidable parasitic inductances introduced by the design rules for non-rotating etching, spread in the junction parameters, thermal fluctuations and the noise generated by the measurement setup were found to affect the functionality of the fabricated circuit.

Two models have been developed to connect the pulse stretcher with RSFQ circuits whose output data pulses have to be converted into extended voltage pulses for further processing by semiconducting circuits. In both cases, data pulses set the pulse stretcher. The reset pulse is applied using a splitter network in one of the models in which the delay is fixed within the circuit. In the second model, the reset pulse is generated by using an external clock. Impedance mismatch causes reflections at the interface. Simulations have been performed to see the behavior of the extended pulses along a passive transmission line terminated with a load resistor. A semiconducting amplifier with low input impedance close to the normal resistance of the output junction is required for a direct connection of the RSFQ circuit with the semiconductor circuits. In practical cases, parasitic inductances, resistances and capacitances introduce additional mismatch depending on the way of connection.