Circuit Exploration in Nanometer CMOS

Description of research

While mainstream CMOS is shifting from the 65nm node to 45nm, this project is investigating the next node: CMOS 32. Scaling of bulk technology, the main architecture for today’s transistors, seems to lead into much problems, referred to as the short channel effect. One of the candidates to replace bulk technology is the FinFET technology.

With bulk transistor scaling, analog circuit designers would more or less know the effects of scaling on circuit level, which allows for relative fast redesign (with as typical main bottle-neck, decreasing supply voltages). If for CMOS 32 the FinFET will be the used, the device architecture will be changed completely: the effects may be more profound and take more interpretation time before optimal circuits can be designed.

As digital circuits are the main consumer of MOSFET devices, device-performance will be optimized for a high high Ion/Ioff ratio. However, if CMOS is to be used for mixed signal design, optimizing for a high Ion/Ioff ratio, might not result in the best performance. The design trade-offs for analog circuit design are much more complicated than those for digital. Therefore, advice to device technologists is needed for a trade off in both digital and analog circuits.

The goal of the project: "Circuit Exploration in Nanometer CMOS", is to explore the possibilities and bottlenecks of the FinFET technology at an early stage of development and to provide feedback to technologists. This way, the technology might be adapted a bit to fulfill some of the wishes of the analog designer and at the same time a head-start in circuit design is created at the moment this technology will become mainstream. The long-term goal is to prove the ability to do mixed signal circuit design, for which a flash AD-converter is chosen to function as a design vehicle.

Advisor(s)

Dr.ir. Anne Johan Annema, prof.dr.ir. Bram Nauta, Maarten Vertregt NXP

Duration

01/12/2005-01-12-2009

Project

Circuit Exploration in Nanometer CMOS

Funding institution

NXP semiconductors

Strategic Research Orientation

Wireless and Sensor Systems

Links to relevant web pages:

http://www.itrs.net/

Pictures

Paul Veldhorst

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Home CTIT symposium 2013 About CTIT News NIRICT Research Meet the PhDs Working at CTIT Internal Information Conferences Open Calls (updated May 3, 2013) Library and Videos Knowledge Transfer Links Sitemap Search	Circuit Exploration in Nanometer CMOS Description of research While mainstream CMOS is shifting from the 65nm node to 45nm, this project is investigating the next node: CMOS 32. Scaling of bulk technology, the main architecture for today’s transistors, seems to lead into much problems, referred to as the short channel effect. One of the candidates to replace bulk technology is the FinFET technology. With bulk transistor scaling, analog circuit designers would more or less know the effects of scaling on circuit level, which allows for relative fast redesign (with as typical main bottle-neck, decreasing supply voltages). If for CMOS 32 the FinFET will be the used, the device architecture will be changed completely: the effects may be more profound and take more interpretation time before optimal circuits can be designed. As digital circuits are the main consumer of MOSFET devices, device-performance will be optimized for a high high Ion/Ioff ratio. However, if CMOS is to be used for mixed signal design, optimizing for a high Ion/Ioff ratio, might not result in the best performance. The design trade-offs for analog circuit design are much more complicated than those for digital. Therefore, advice to device technologists is needed for a trade off in both digital and analog circuits. The goal of the project: "Circuit Exploration in Nanometer CMOS", is to explore the possibilities and bottlenecks of the FinFET technology at an early stage of development and to provide feedback to technologists. This way, the technology might be adapted a bit to fulfill some of the wishes of the analog designer and at the same time a head-start in circuit design is created at the moment this technology will become mainstream. The long-term goal is to prove the ability to do mixed signal circuit design, for which a flash AD-converter is chosen to function as a design vehicle. Advisor(s) Dr.ir. Anne Johan Annema, prof.dr.ir. Bram Nauta, Maarten Vertregt NXP Duration 01/12/2005-01-12-2009 Project Circuit Exploration in Nanometer CMOS Funding institution NXP semiconductors Strategic Research Orientation Wireless and Sensor Systems Links to relevant web pages: http://www.itrs.net/ Pictures