Functional hardware description and synthesis

Description of research

To develop abstraction mechanisms for hardware architectures, in which both functional and non-functional properties can be expressed in a semantic way. Additionally, to develop automated synthesis to an efficient netlist for these hardware descriptions. A hardware architecture is described in a functional language due to the semantic equivalence of the evaluation of a functional language and the execution of digital hardware: both are highly parallel.

Advisor(s)

J. Kuper

Duration

1/2010 – 1/2014

Project

Service-oriented Operating Systems (S(o)OS)

Funding institution

European Union / FP7

Strategic Research Orientation

Wireless and Sensor Systems (WISE)

Links to relevant web pages:

http://clash.ewi.utwente.nl/

http://www.soos-project.eu/

Pictures